1. Field of the Invention
The present invention relates to a memory device and a semiconductor device including the memory device.
2. Description of the Related Art
Semiconductor devices such as central processing units (CPUs) have a variety of configurations depending on the application and are generally provided with buffer memory devices capable of high-speed writing and reading of data, such as a register and a cache, as well as a main memory device for storing data or an instruction. A buffer memory device is provided in a CPU so as to be located between an arithmetic unit and a main memory device for the purpose of reducing access to the low-speed main memory device and speeding up the arithmetic processing.
In general, a flip-flop is used as a register, and a static random access memory (SRAM) is used as a cache. Patent Document 1 shown below discloses a configuration in which a volatile memory such as an SRAM and a nonvolatile memory are used in combination as a cache.